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vardump parent
The sorry landscape of open source FPGA tools has kept me away from them whenever possible.

Programmable IO such as RP2040 (Raspberry Pi Pico) are eating a tiny (but increasing) part of FPGA lunch.

Altera (well, Intel) and Xilinx (well, AMD) are just hurting themselves by not working to move towards an open ecosystem.

Edit: Oh, so AMD is partially behind F4PGA. Well, points for them, perhaps it's time to move away from Altera altogether?

jpm_sd
The RP2040 is an example of a "microcontroller", a low-power processor with onboard program storage (typically Flash these days), and a bunch of handy peripherals (UART, I2C, PWM etc.) in a single small package. This is a modern type with 32 bit ARM processor but microcontrollers have been used by the millions, for decades(!) in consumer products, automotive hardware, etc. Not too many 8 bit machines used by hobbyists today, but 8051 and PIC and AVR live on in numerous product lines.

The RP2040 is definitely not pioneering here. More of a well-marketed "me too" device IMHO.

FPGAs, on the other hand, have always been for specialized applications. High speed signal processing for imaging, sonar, or radar. Boundary-pushing network interface design. That kind of thing. They use a ton of power and developers are hard to find.

packetlost
> The RP2040 is definitely not pioneering here. More of a well-marketed "me too" device IMHO

Have you actually used one or looked at the datasheet? The 4 PIO state machines are pretty unique in the MCU ecosystem as far as I can tell. It makes "bitbanging" a completely acceptable approach for a huge number of protocols.

jpm_sd
Completely acceptable as a clever hack, or for real production designs?
packetlost
It's the explicit purpose of the submodule. It's like a microprocessor with fine-grained clockspeed control (fraction of the main CPU clock) and like 9 instructions that focus on driving GPIO pins. There's FIFO queues for pushing/pulling data from/to the PIO from/to the main CPU, so you don't have to waste any real clock cycles (other than to make sure your buffers aren't starved)
vardump OP
> (fraction of the main CPU clock)

Just watch out for aliasing jitter at higher fractions (frequencies). If that's going to be an issue, it's best to use integer fractions of the main CPU clock, if possible.

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vardump OP
I'd say RP2040 PIO good for real production designs. Better documented and less surprises than many (most?) other microcontrollers. Haven't used it professionally, though, so caveat emptor.
vardump OP
I completely agree with what you said.

However, there are applications where you just need high speed "bit banging", where you pretty much had to use an FPGA before.

I meant to mention RP2040 as an example, since I was talking about it's PIO feature, not because other microcontrollers do not have similar features, but because it's the most well known.

For example, RP2040 PIO is flexible and fast enough to run DVI/HDMI purely in software. Bit banging at 133 MHz (and even at 252 MHz overclocked, I'm sure there's no need for the do-not-use-in-production OC disclaimer).

https://hackaday.com/2021/02/12/bitbanged-dvi-on-a-raspberry...

GeneT45
I avoid Altera altogether because Intel doesn't seem to care much about them. Quartus has either been abandoned, or received the barest minimum updates. Setting up a new system is an adventure in patches & workarounds.*

*It's possible that some of this has been remedied, I gave up on them a few years ago and haven't checked back...

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