I'm currently learning programming FPGAs using open source toolchain, my idea is to completely go away from MCUs towards cheap FPGAs and RISC-V. This is actually my third attempt to mess with FPGAs. Several years ago I tried Xilinx, before that I tried Altera. But their proprietary bloatware made me sick. Maybe I'm too much used to command line hence cannot comprehend their world-wide recognizable goodies. On the opposite I pretty much like Yosys, Verilator and SpinalHDL (I didn't like nMigen because of python). In my opinion, nMigen, SpinalHDL and other higher level HDLs are much more freindly to beginners than Verilog to which you are bound if you decide to go conventional way.