I could count the time to "install open tools", too, but it would be even less favorable to the proprietary toolchain. It was, after all, a single command (on Arch Linux) that finished in a few seconds at worst.
There's a lot of tutorials these days based on iCE40 and open toolchain.
Then I went on to read yosys's documentation, and learned a great deal about how the flow from verilog to hardware works in a very short amount of time, by just doing so.
When someone says "beginner", I never think of someone who already knows the Unix command line.
I've been doing this for far too many years, and I'm struggling to think of anybody I know who does FPGA work and knows the UNIX command line--even among the experienced hands.
You are likely too biased in the Windows world, which is exactly what HN is not (probably! I have no data to prove that, just a hunch based on the discussions I took a part of on HN).
However, none of my colleagues in hardware design really know UNIX--neither junior nor senior.
And what's with the downvoters in this thread? Stop downvoting people because you disagree with them--COMMENT, DAMMIT.
I'm beginning to suspect that the HN "You're posting too fast" limit gets hit too quickly and people can only upvote/downvote so they default to that.
I agree with you that downvotes are useless when one simply disagrees and don't help the author or the reader learn. With the "flag" feature though, I am not sure I see the point of downvoting at all (other than when someone repeats the same disproven argument in the thread): upvoting is there to indicate "me too", but any such thing turns into a popularity context.
Installation instructions (basically just extract the folder somewhere): https://github.com/im-tomu/fomu-toolchain
Workshop: https://github.com/esden/wtfpga
Sadly this frequently manifests as huge, Eclipse based bloatware with byzantine installation processes and comical fragility. Precious few understand the value of lightweight, robust tools and confuse elaborate graphical wizards and code generators with quality.
This is highly dependent upon how often you use the tool.
If I do an FPGA project once every two years and the scope is less than 3 months, user-friendliness is very much a useful metric for my tools.
If I'm doing an FPGA project that is going to take 15 months, then lack of user-friendliness certainly won't stop me (but it will make me grouchy).
Perhaps Xilinx-land is different, but I have seen an intern go from blank Windows machine to "blink an LED" on an Altera board in about an hour or so with no Verlog/VHDL.
I have never seen this with the open-source toolchains.
Your experience differs. YMMV. Disclaimers. etc.