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throwawayabcdef parent
No need. I gave ChatGPT this prompt: "Write a data mover in Xilinx HLS with Vitis flow that takes in a stream of bytes, swaps pairs of bytes, then streams the bytes out"

And it did a good job. The code it made probably works fine and will run on most Xilinx FPGAs.


pjc50
> The code it made probably works fine

Solve your silicon verification workflow with this one weird trick: "looks good to me"!

throwawayabcdef OP
Its how I saved cost and schedule on this project.
ben_w
I don't even work in hardware, and yet even I have still heard of the Pentium FDIV bug, which happened despite people looking a lot more closely than "probably works fine".

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