Unless you're making it possible to access memory on every instruction that takes an argument, or adding more addressing modes that are redundant with ALU operations, or making registers that can only be used for one purpose, etc., it's not really turning into CISC. The acronyms are misnomers, or maybe you just need to think of what's being "reduced" as the number of micro-ops per high-level instruction. Regardless, you don't turn RISC into CISC just by adding more instructions.