CPLDs ran into scaling issues. Routing problems increase exponentially the more logic you add to them. Eventually routing delays make it pointless, not to mention power usage is horrific.
Not many CPLDs were made beyond about 256 macrocells. Even a typical lowend FPGA will be 5k to 50k "macrocells" or some other form of LUT-based logic cell.
As an example, the last time I had to design with a CPLD it was a 128 macrocell part, and had a static power draw of 0.5W, which is kind of ridiculous.
Altera did try to make a sort of hybrid part, the MaxII and MaxV series which are just tiny FPGAs that are flash programmed. Though, if you wanted that, there are plenty of better ones out there like the ice40.
mwbajor
CPLDs are used mainly when you have a PCB design with lots of slow logic that you want to simplify or decrease in space and thats it. They still have their purpose.
Not many CPLDs were made beyond about 256 macrocells. Even a typical lowend FPGA will be 5k to 50k "macrocells" or some other form of LUT-based logic cell.
As an example, the last time I had to design with a CPLD it was a 128 macrocell part, and had a static power draw of 0.5W, which is kind of ridiculous.
Altera did try to make a sort of hybrid part, the MaxII and MaxV series which are just tiny FPGAs that are flash programmed. Though, if you wanted that, there are plenty of better ones out there like the ice40.